Analog VLSI Systems Research

Michael D. Godfrey

Last updated: 12 November 2007
Please send comments or questions to: godfrey@isl.stanford.edu.

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This page provides links to publications and reports and a chronology of the fabricated chips which were designed in the Analog VLSI Systems Group in the Information Systems Laboratory  at Stanford University, Electrical Engineering.

Examples of work carried out in this program are:


Talks and Papers on Analog VLSI

A few of my talks and papers on the subject of Analog VLSI Systems:
  1. A Stanford Seminar from 1995: "Mathematical Engineering and VLSI Systems," (updated on 31 December 2001 to PDF with scalable fonts).

  2. A paper on VLSI device and circuit modeling: "CMOS Device Modeling for Subthreshold Circuits," IEEE Trans. on Circ. and Sys II; Analog and Digital Signal Processing, vol. 39, no. 8, Aug. 92.

  3. "A VLSI Device Model for Analog Circuits." This second paper substantially supersedes the IEEE paper. It is at present under revision for possible publication, if I ever get around to resubmitting it. An update was made on 5 May 2004. The changes in this update include several clarifications and updated Figures. There is an extended discussion of the history of measurement of the band gap energy and its temperature dependence. 26 September 2004: minor update to correct Table of Contents.

    In addition, the Octave/Matlab files which are discussed in the paper are available in tar format. These files include the model as described in the paper and example analysis and plotting routines. These routines generated some of the plots shown in the paper. The code is old enough so that some changes will be needed for them to function correctly when using current version of Octave or Matlab. The changes concern the plotting of the data.

  4. A paper titled "The tanh Transformation" which describes some useful properties of the tanh function and indicates specifically how these properties can be useful in analog VLSI circuits.


Research on CMOS imaging

Boyd Fowler's Ph.D. thesis: " CMOS Area Image Sensors with Pixel Level A/D Conversion"


Research on VLSI and SMP DSP Implementations of Wavelet Transforms

Papers on wavelet transforms mainly by Tim Edwards, including our paper from ICNN2 1995, "An Analog Wavelet Transform Chip," (updated from PostScript to PDF on 20 July, 2002) and a paper written by Tim, "Discrete Wavelet Transforms: Theory and Implementation" (also updated from PostScript to PDF on 20 July, 2002) about the wavelet transform implementation on the Star Semiconductor SMP DSP chip. This implementation is of technical interest even though Star Semiconductor Inc. is no longer in business.


VLSI Implementation Tools

The versions of Gemini 2.7.2 and IRSIM 9.5 which we used under Redhat Linux 9 are available here. As far as we know, this is the latest version of Gemini. However, Tim Edwards has made IRSIM 9.7 available, which is likely a better choice. For many years we used a modified version of Magic 6.5.1 but it is best to obtain a current version from Cornell. Or, if you want the latest, you could try Tim Edwards current Magic site. Magic 7.4 (or 5) contains all the changes that we had made. In particular, it contains the file locking mechanism, which supports multiple users accessing the same design. We have moved to the latest 7.x version.

The OS/2 ports of Magic 6.5.1, Gemini 2.7.2 and IRSIM 9.5 have been available here. I have not updated the distributions recently, and no longer know anyone who still uses OS/2.


Implemented VLSI Circuits

The Table below lists the chips which have been fabricated through the MOSIS fabrication service


Analog VLSI Lab Experimental Chips Fabricated at MOSIS

Through August 1997


NoteChip NameFab date MOSIS ID Project Purpose
(1) SAS1 26-06-91 N16ADN1 cochlea, test transistors, filter
SAS2 13-11-91 N1BBEF1 test-array, amps, pulse-freq circuits, floating-gates
SAS3A(cls1A)10-12-91N1CFDP1392B Class Lab chip (Caltech)
SAS3B(cls1B)11-03-92N23SCV1392B Class Lab chip (Stanford)
SAS4A08-04-92N24VEC1Two cochleas for directional sound
SAS4B08-04-92N24VDE1Correlator for cochleas
SAS626-08-92N28RAT1Model of stringed instrument and pulse-frequency circuits
SAS726-08-92N28RAW1Student test circuits and test oscillator
SAS818-11-92N2BIBQ1Transistor array for analysis of sources of device variation.
SAS916-12-92N2CPDG1Analog wavelet transform
(2) SAS1022-03-93N33DBQ1Single chip radio transmitter and test photodiodes.
SAS1128-04-93N34OEJ1Analog wavelet transform
(3) SAS12 07-07-93 N37FAD1Imaging circuit (64x64)
SAS1307-07-93N37GAB1Phase-modulated I/O interface
SAS1414-07-93N37ECB1Concurrent implementation of sound localization.
SAS1514-07-93N37EBU1 Experimental phototransistors
SAS1611-08-93N38JDA1Analog wavelet transform
SAS17 08-12-93N3CKAD 41376Test circuits for imaging array
SAS1803-05-94 IBMN45XAH 42797Imaging test circuits (IBM)
SAS1903-05-94 IBMN45XAF 42771Class chip and tests (IBM)
SAS2011-05-94 IBMN45XAE 42857Imaging test circuits (IBM)
(4) SAS2106-07-94 HPN47HAQ 43286Fast interconnect for FPGA's
SAS2219-07-94 IBMN47JAF 43331Class chip and tests (IBM)
SAS2325-01-95 HPN51UAM 44980 Imaging test circuits
(5) SAS2425-01-95 HPN51UAP 44981async FPGA system
SAS2530-01-95 HPN52VAD 45002Analog filters for auditory system
SAS2601-02-95 HPN52VAE 45016process noise measurements
(5) SAS2714-02-95 HPN52XAH 45213async FPGA system
SAS2801-03-95 HPN53ZAK 45279Analog filters for autitory system
(5) SAS29 15-03-95 HP N53DAG 45496 another async FPGA array
SAS30 11-04-95 HP N54FAH 45733 Analog filters for auditory system.
(5) SAS31a 24-05-95 HP N55NAF 46036 async FPGA system
SAS31b 21-06-95 HP N56QAP 46320 128x128 imaging array
SAS3208-05-96 HP N65WAA 48813auditory processor
SAS3312-06-96 HPN66DAD 49180auditory processor
SAS3409-12-96 HPN6CLAM 50733auditory processor
SAS3527-03-97 HPN73HAM 51656auditory processor
(6) IMHP01 11-08-97 HP N77EAW 52509 640x512 imaging array

Notes on chips of special interest:

  1. This chip produced a paper on subthreshold device modeling, and it produced a working model of the cochlea which resulted in a Ph.D. thesis by Neal Bhadkamkar.

  2. This chip contains a very small, very low-cost single chip radio transmitter (implemented by Boyd Fowler) which could do lots of useful things around the home, or elsewhere.

  3. This chip is a 64x64 phototransistor array which contains, at each pixel, analog light measuring circuits, sigma-delta modulator, and A/D conversion. It has many performance and cost advantages over CDDs. This is Boyd Fowler's Ph.D. work. It has been reported on in the ISSCC Conference 94, and the Ph.D. has been awarded.

  4. This chip demonstrates a major performance improvement for the interconnect lines used in FPGA structures. It is the Ph.D. thesis work of Ivo Dobbelaere. It has been reported on in the ISSCC Conference 95, and the Ph.D. has been awarded.

  5. This is another Ph.D. project by Dana How which implements a high-performance asynchronous FPGA system. His Ph.D. has been awarded.

  6. This chip was fabricated on the 0.35um process. It contains approximately 1.3 million transistors. The chip is fully functional and will be the subject of a number of Ph.D.'s and publications. Check out Abbas El Gamal's Group.


As time permits we will add more material to this page, and provide more links to reports and publications.


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